@HPCpodcast-64: RISC-V CTO Mark Himelstein
Mark Himelstein, CTO of RISC-V joins us to discuss RISC-V: HPC type use cases from sensor to supercomputer, achieving customization without loss of compatibility, AI and its impact on chips and systems, and the question on everyone's mind: when do we see RISC-V in servers and supercomputers! [audio mp3="https://orionx.net/wp-content/uploads/2023/07/064@HPCpodcast_RISC-V_Mark-Himelstein_20230703.mp3"][/audio] The post @HPCpodcast-64: RISC-V CTO Mark Himelstein appeared first on OrionX.net.
@HPCpodcast with Shahin Khan and Doug Black
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Show Notes
Mark Himelstein, CTO of RISC-V joins us to discuss the latest developments with the RISC-V instruction set architecture (ISA) and its growing community and footprint. Topics include HPC type use cases from sensor to supercomputer, achieving customization without loss of compatibility, AI and its impact on chips and systems, and the question on everyone’s mind: when do we see RISC-V in servers and supercomputers!
You may also be interested in Shahin’s conversation with Mark in August 2020 and see how things have evolved.
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The post @HPCpodcast-64: RISC-V CTO Mark Himelstein appeared first on OrionX.net.